Summary and Info
This highly relevant and up-to-the-minute book constitutes the refereed proceedings of the Third International Conference on High Performance Embedded Architectures and Compilers, HiPEAC 2008, held in Göteborg, Sweden, January 27-29, 2008.The 25 revised full papers presented together with 1 invited keynote paper were carefully reviewed and selected from 77 submissions.The papers are organized into topical sections on a number of key subjects in the field, including multithreaded and multicore processors, reconfigurable ASIP, and compiler optimizations.Also covered are industrial processors and application parallelization, power-aware techniques, and high-performance processors.The book also contains material on the collection and analysis of profiles as well as optimizing memory performance.
More About the Author
Mateo Valero Cortés (born 1952 in Alfamén) is a Spanish computer architect. His research encompasses different concepts within the field of computer architecture, a discipline in which he has published more than 700 papers in journals, conference proceedings and books.
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