Summary and Info
The first part of this work discusses the reasons on why we would like todesign an 802.11g transceiver and the architecture of the transceiver. Wedecide to use a superheterodyne architecture for the transceiver with thebaseband filters and to re-use the IF Variable Gain Control (VGA) in bothmodulator and demodulator to reduce the chip size. System link budgetcalculation has also been showed on this part.The second part include Chapters 4 and 5. The DC offset cancellation inmodulator, and the I/Q gains and phases imbalance auto-calibration in bothmodulator and demodulator are discussed on this part. The final chaptersillustrate the chip measured result.